1. Field of the Invention
The present invention relates to organic electro-luminescence devices, and more particularly to an organic electro-luminescence device and a method of driving the same wherein deterioration of a driving thin film transistor (TFT) is prevented.
2. Description of the Related Art
Until recently, cathode ray tubes (CRTs) have generally been used in display systems. However, use of newly developed flat panel displays such as liquid crystal displays (LCDs), field emission displays (FEDs), plasma display panels (PDPs), and electro-luminesence (EL) devices are becoming increasingly common due to their low weight, thin demensions, and low power consumption.
PDPs, being thin, lightweight, and having large display areas, are structurally simple and relatively easy to manufacture. However, PDSs have relatively poor light emission characteristics causing the pictures they display to have a low brightness. Further, PDPs generally dissipate a large amount of power. Light emission characteristics of LCDs, on the other hand, are generally better than those of PDPs. However, LCDs having large display areas are difficult to fabricate LCDs because their manufacturing processes generally include those used in the semiconductor industry and are provided with a plurality of switching elements such as thin film transistors (TFTs). Accordingly, LCDs are generally used as display devices in notebook computers.
Depending on the type of material used as a light-emitting layer, EL devices are classifiable as inorganic EL devices or as organic EL devices. Generally, EL devices are self-luminous devices with excellent response speeds and light emission characteristics and are capable of displaying images at a high brightness and over wide ranges of viewing angles.
FIG. 1 illustrates cross-sectional view of a related art organic electro-luminescence device.
Referring to FIG. 1, organic EL devices generally include an anode electrode 2 made of a transparent, electrically conductive material patterned on a glass substrate 1, a hole injection layer 3 deposited over the anode electrode 2, a light emitting layer 4 deposited over the hole injection layer 3, an electron injection layer 5 deposited on the anode electrode 2, and a cathode electrode 6 deposited on the electron injection layer 5 and formed of a metallic material.
When a drive voltage is applied to the anode and cathode electrodes 2 and 6, holes in the hole injection layer 3, and electrons in the electron injection layer 5, migrate toward and excite the light emitting layer 4 to emit light in the visible wavelength range. Accordingly, pictures or images within the visible wavelength range can be displayed by the light emitting layer 4.
FIG. 2 illustrates a pixel arrangement in a related art organic electro-luminescence device. FIG. 3 illustrates an equivalent circuit diagram of the related art pixels of a first type within the organic electro-luminescence device shown in FIG. 2.
Referring to FIGS. 2 and 3, related art organic electro-luminescence devices (OELDs) generally include m number of column lines CL1 to CLm, n number of row lines RL1 to RLn, and m×n number of pixels P arranged in a matrix pattern defined by crossings of the column lines CL1 to CLm and the row lines RL1 to RLn. Within the related art OELD shown in FIG. 2, the number of column lines corresponds to the number of pixel signals for red, green, and blue colors is applied by the column lines CL1 to CLm. Further, each of the pixels P within the related art OELD includes switching devices such as a first TFT T1 provided as a p-type MOS-FET and formed at crossings of the column lines CL1 to CLm and row lines RL1 to RLn, a second TFT T2 (i.e., a driving TFT) provided as a p-type MOS-FET and formed between a cell drive voltage source VDD and an organic electro-luminescence cell for driving the electro-luminescence cell. Moreover, each pixel P includes a capacitor Cst connected between the first and second TFTs T1 and T2.
The first and second TFTs T1 and T2 each include source, drain, and gate terminals and may be turned on in response to a negative scan voltage applied from the row lines RL1 to RLn. When the first TFT T1 is turned on (i.e., when the first TFT T1 is maintaines in an ON state), an electrically conductive path is created between the source terminal and the drain terminal of the first TFT T1. When the voltage applied from the row lines RL1 to RLn is less than a threshold voltage Vth of the first TFT T1, the first TFT T1 is turned off (i.e., the first TFT T1 is maintained in an OFF state) and the electrically conductive path ceases to exist. While the first TFT T1 is maintained in the ON state, a data voltage DATA applied from a corresponding one of the column lines CL is applied to the gate terminal of the second TFT T2 via the first TFT T1. When the first TFT T1 is maintained in the OFF state, the data voltage DATA cannot not be applied to the second TFT T2.
Accordingly, the second TFT T2 controls a current conducted between its source and drain terminals in accordance with the data voltage DATA applied to its gate terminal to cause the electro-luminescence cell to emit light, wherein the brightness to which the light is emitted corresponds to the data voltage DATA.
The capacitor Cst stores a voltage equal to the voltage difference between the data voltage DATA and the cell drive voltage VDD. Accordingly, the capacitor Cst causes the voltage applied to the gate terminal of the second TFT T2 to be uniformly maintained during one frame period of the OELD while the current is uniformly applied to the electro-luminescence cell during the one frame period.
FIG. 4 illustrates scan and data voltage waveforms applied to the related art organic electro-luminescence device shown in FIGS. 2 and 3.
Referring to FIG. 4, scan pulses SCAN having a negative scan voltage are sequentially applied to the plurality of row lines RL1 to RLn while data voltages DATA are simultaneously applied to each of the plurality of column lines CL1 to CLm in synchrony with the application of each of the scan pulses SCAN. Accordingly, the data voltage DATA is transmitted by the first TFT T1 and is charged in the capacitor Cst.
FIG. 5 illustrates an equivalent circuit diagram of the related art pixels of a second type within the organic electro-luminescence device shown in FIG. 2.
Referring to FIGS. 2 and 5, related art OELD also generally include m number of column lines CL1 to CLm, n number of row lines RL1 to RLn, and m×n number of pixels P arranged in a matrix pattern defined by the crossings of the column lines CL1 to CLm and the row lines RL1 to RLn. Within the related art OELD shown in FIG. 2, the number of column lines corresponds to the number of pixel signals for red, green, and blue colors is applied by the column lines CL1 to CLm. Further, each of the pixels P within the related art OELD includes switching devices such as a first TFT T1 (i.e., a driving TFT) formed between the cell drive voltage source VDD and the electro-luminescence cell to drive the electro-luminescence cell; a second TFT T2 connected to the cell drive voltage source VDD to form a current mirror with the first TFT T1; a third TFT T3 connected between the second TFT T2, the column line CL, and the row line RL, to respond to a signal applied from the row line RL; a fourth TFT T4 connected between the gate terminals of the first TFT T1, the second TFT T2, the row line RL, and the third TFT T3. Moreover, each pixel P includes a capacitor Cst connected between the gate terminals of the first and second TFTs T1 and T2 and the voltage supply line VDD. The first to fourth TFTs T1 to T4 are generally provided as p-type MOS-FETs.
The third and fourth TFTs T3 and T4 each include source, drain, and gate terminals and may be turned on in response to a negative scan voltage applied from the row lines RL1 to RLn. When the third and fourth TFTs T3 and T4 are turned on, (i.e., when the third and fourth TFTs T4 and T5 are maintained in an ON state), electrically conductive paths are created between the source and drain terminals third and fourth TFTs T3 and T4. When the voltage applied from the row lines RL1 to RLn is less than a threshold voltage Vth of the third and fourth TFTs T3 and T4, the third and fourth TFTs T3 and T4 are turned off (i.e., third and fourth TFTs T3 and T4 are maintained in an OFF state) and the electrically conductive paths cease to exist. While the third and fourth TFTs T3 and T4 are maintained the ON state, the data voltage DATA applied from a corresponding one of the column lines CL is applied to the gate terminal of the first TFT T1 via the third and fourth TFTs T3 and T4. When the third and fourth TFTs T3 and T4 are maintained in the OFF state, data voltage DATA is not applied to the first TFT T1.
Accordingly, the first TFT T1 controls a current conducted between its source and drain terminals in accordance with the data voltage DATA applied to its gate terminal to cause the electro-luminescence cell to emit light, wherein the brightness to which the light is emitted corresponds to the data voltage DATA.
The second TFT T2 is provided as a current mirror of the first TFT T1 to uniformly control the current conducted from the first TFT T1 to the electro-luminescence cell.
The capacitor Cst stores a voltage equal to the voltage difference between the data voltage DATA and the cell drive voltage VDD. Accordingly, the capacitor Cst causes the voltage applied to the gate terminal of the first TFT T1 to be uniformly maintained during one frame period of the OLED while the current is uniformly applied to the electro-luminescence cell during the one frame period.
FIG. 6 illustrates scan and data voltage waveforms applied to the related art organic electro-luminescence device shown in FIGS. 2 and 5.
Referring to FIG. 6, scan pulses SCAN having a negative scan voltage are sequentially applied to the plurality of row lines RL1 to RLn while data voltages DATA are simultaneously applied to each of the plurality of column lines CL1 to CLm in synchrony with the application of each of the scan pulses SCAN. Accordingly, the data voltage DATA flows through the third and fourth TFTs T3 and T4 to be charged in the capacitor Cst. The data voltage DATA charged in the capacitor Cst is held for one frame period and controls the current path of the first TFT T1.
Generally, the cell drive voltage VDD is applied as a direct current (DC) voltage. Referring back to FIG. 3, the second TFT T2 is turned on differently from the first TFT T1. Accordingly, and upon applying the cell drive voltage VDD to the second TFT T2 of FIG. 3 (i.e., the driving TFT), the electro-luminescence cell is turned on and light is emitted. Referring now to FIG. 5, the first TFT T1 is turned on differently from the third and fourth TFTs T3 and T4. Accordingly, upon applying the cell drive voltage VDD to the first TFT T1 of FIG. 5 (i.e., the driving TFT), the electro-luminescence cell is turned on and light is emitted.
When driving the related art OELD of FIG. 2, the driving TFTs shown in FIGS. 3 and 5 (i.e., the second and first TFTs T2 and T1, respectively) become deteriorated due to a charge introduced by a silicon channel trapping phenomenon at an interface between a gate insulating film and a silicon layer of each of the driving TFT. Accordingly, current between the terminals of the first and second TFTs T1 and T2, controlled in accordance with the data voltage DATA applied thereto, becomes deleteriously and irreversibly affected, as shown in FIG. 7. Therefore, once electro-luminescence cells are turned off, current cannot be identically applied to turn the electro-luminescence cells back on. Consequently, residual images are generated within the pixels of the OELD device.